The present invention pertains to system testing. More particularly, the present invention pertains to a headerless interconnect that permit coupling test equipment to a microprocessor or other complex semiconductor circuitry incorporated in silicon chips contained in a system or platform without a connector present on the platform under test.
There are numerous testing schemes for carrying out a system or platform testing available in the art. For example, the IEEE 1149.1 (Joint Test Action Group (JTAG) 1990), provides such a testing system. In a JTAG system, as with other testing systems, the system, which contains circuits, typically on chips, to be tested must be coupled to a testing system. This is typically done in the manner illustrated in FIGS. 1A and 1B showing, respectively, exploded front and side elevation views of a JTAG probe 15, printed circuit board 11 and JTAG cable 19 with connector 21. The traces, in the form of a JTAG bus coupled to circuits to be tested, are on the motherboard or baseboard 11. A header 13 is soldered to the board 11. For example, this may be a 2 mm. header with two rows of 13 pins. A JTAG probe 15 having a matching 2 mm. receptacle 14, shown above the header, plugs into the header when it is desired to do testing. In conventional fashion, probe 15 contains circuits such as buffers and clock drivers.
JTAG probe 15 has a connector 17 at its side opposite receptacle 14. A JTAG cable 19 with a plug 21 on its end, shown above the probe 15, plugs into this connector, and makes a connection with the host which is carrying out the testing.
This arrangement has a number of disadvantages. The socket receptacles in 14 often become weak and do not make adequate connection with pins 13 due to frequent detachment/attachment. Furthermore, the header provides inadequate support when the board 11 is placed in different orientations. For example, if the board 11 is turned to be vertical, the receptacle 14 can become disconnected or make marginal connection with pins 13 because there is no retention mechanism other than the frictional force of the socket receptacles. Even if the board remains fixed, the probe and cable tend to overstress the pins of the header.
It is also the case that the header 13 is removed after the development of a product. As a result, it is not available for testing during manufacturing or for maintenance.
In view of the problems set forth above, there is a need for a way to establish contact with the bus which couples to circuits to be tested that is inexpensive, reliable and which can be used beyond the development stage.